A temperature analysis for NFC-powered smart lab-on-chip devices

Carolin Kollegger; Christoph Steffan; Philipp Greiner; Clemens Rabl; David Lugitsch; Gerald Holweg; Bernd Deutschmann

doi:10.1109/MWSCAS.2018.8623976

A temperature analysis for NFC-powered smart lab-on-chip devices

Carolin Kollegger, Christoph Steffan, Philipp Greiner, Clemens Rabl, David Lugitsch, Gerald Holweg, Bernd Deutschmann

Institut für Elektronik (4390)

Publikation: Beitrag in Buch/Bericht/Konferenzband › Beitrag in einem Konferenzband › Begutachtung

Abstract

This paper presents a temperature analysis for NFC-powered Lab-on-Chip (LoC) solutions. It is based on a monolithically implemented LoC and uses a 130 nm standard CMOS process. The LoC has an active chip area of 6.24 mm ² . An application-independent temperature gathering mesh is implemented on the chip substrate. It allows a real time NFC-caused temperature analysis. Measurement data regarding heat spreading, the influence of the glob top, and the effect of the PCB layout is presented. A warming reduction from 23.05°C to 3.8°C using the same power source is achieved. Detailed data on the temperature gradient over time for warming and cooling is also provided.

Originalsprache	englisch
Titel	2018 IEEE 61st International Midwest Symposium on Circuits and Systems, MWSCAS 2018
Herausgeber (Verlag)	Institute of Electrical and Electronics Engineers
Seiten	1058-1061
Seitenumfang	4
Band	2018-August
ISBN (elektronisch)	9781538673928
DOIs	https://doi.org/10.1109/MWSCAS.2018.8623976
Publikationsstatus	Veröffentlicht - 22 Jan. 2019
Veranstaltung	61st IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2018 - Windsor, Kanada Dauer: 5 Aug. 2018 → 8 Aug. 2018

Konferenz

Konferenz	61st IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2018
Land/Gebiet	Kanada
Ort	Windsor
Zeitraum	5/08/18 → 8/08/18

ASJC Scopus subject areas

Elektronische, optische und magnetische Materialien
Elektrotechnik und Elektronik

Zugriff auf Dokument

10.1109/MWSCAS.2018.8623976

Andere Dateien und Links

http://www.scopus.com/inward/record.url?scp=85062234817&partnerID=8YFLogxK

Dieses zitieren

Kollegger, C., Steffan, C., Greiner, P., Rabl, C., Lugitsch, D., Holweg, G., & Deutschmann, B. (2019). A temperature analysis for NFC-powered smart lab-on-chip devices. in 2018 IEEE 61st International Midwest Symposium on Circuits and Systems, MWSCAS 2018 (Band 2018-August, S. 1058-1061). Artikel 8623976 Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/MWSCAS.2018.8623976

A temperature analysis for NFC-powered smart lab-on-chip devices. / Kollegger, Carolin; Steffan, Christoph; Greiner, Philipp et al.
2018 IEEE 61st International Midwest Symposium on Circuits and Systems, MWSCAS 2018. Band 2018-August Institute of Electrical and Electronics Engineers, 2019. S. 1058-1061 8623976.

Publikation: Beitrag in Buch/Bericht/Konferenzband › Beitrag in einem Konferenzband › Begutachtung

Kollegger, C, Steffan, C, Greiner, P, Rabl, C, Lugitsch, D, Holweg, G & Deutschmann, B 2019, A temperature analysis for NFC-powered smart lab-on-chip devices. in 2018 IEEE 61st International Midwest Symposium on Circuits and Systems, MWSCAS 2018. Bd. 2018-August, 8623976, Institute of Electrical and Electronics Engineers, S. 1058-1061, 61st IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2018, Windsor, Kanada, 5/08/18. https://doi.org/10.1109/MWSCAS.2018.8623976

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title = "A temperature analysis for NFC-powered smart lab-on-chip devices",

abstract = " This paper presents a temperature analysis for NFC-powered Lab-on-Chip (LoC) solutions. It is based on a monolithically implemented LoC and uses a 130 nm standard CMOS process. The LoC has an active chip area of 6.24 mm 2 . An application-independent temperature gathering mesh is implemented on the chip substrate. It allows a real time NFC-caused temperature analysis. Measurement data regarding heat spreading, the influence of the glob top, and the effect of the PCB layout is presented. A warming reduction from 23.05°C to 3.8°C using the same power source is achieved. Detailed data on the temperature gradient over time for warming and cooling is also provided. ",

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AU - Holweg, Gerald

AU - Deutschmann, Bernd

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N2 - This paper presents a temperature analysis for NFC-powered Lab-on-Chip (LoC) solutions. It is based on a monolithically implemented LoC and uses a 130 nm standard CMOS process. The LoC has an active chip area of 6.24 mm 2 . An application-independent temperature gathering mesh is implemented on the chip substrate. It allows a real time NFC-caused temperature analysis. Measurement data regarding heat spreading, the influence of the glob top, and the effect of the PCB layout is presented. A warming reduction from 23.05°C to 3.8°C using the same power source is achieved. Detailed data on the temperature gradient over time for warming and cooling is also provided.

AB - This paper presents a temperature analysis for NFC-powered Lab-on-Chip (LoC) solutions. It is based on a monolithically implemented LoC and uses a 130 nm standard CMOS process. The LoC has an active chip area of 6.24 mm 2 . An application-independent temperature gathering mesh is implemented on the chip substrate. It allows a real time NFC-caused temperature analysis. Measurement data regarding heat spreading, the influence of the glob top, and the effect of the PCB layout is presented. A warming reduction from 23.05°C to 3.8°C using the same power source is achieved. Detailed data on the temperature gradient over time for warming and cooling is also provided.

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