VLSI Implementation of a Functional Unit to Accelerate ECC and AES on 32-bit Processors

Stefan Tillich, Johann Großschädl

Research output: Chapter in Book/Report/Conference proceedingConference contributionResearchpeer-review

Original languageEnglish
Title of host publicationArithmetic of Finite Fields, First International Workshop, WAIFI 2007, Madrid, Spain, June 2007, Proceedings
EditorsClaude Carlet
Place of PublicationBerlin
PublisherSpringer Verlag
Pages40-54
Volume4547
ISBN (Print)978-3-540-73073-6
DOIs
Publication statusPublished - 2007
EventInternational Workshop on the Arithmetic of Finite Fields - Madrid, Spain
Duration: 21 Jun 200722 Jun 2007

Publication series

NameLecture Notes in Computer Science
PublisherSpringer Verlag

Conference

ConferenceInternational Workshop on the Arithmetic of Finite Fields
CountrySpain
CityMadrid
Period21/06/0722/06/07

Treatment code (Nähere Zuordnung)

  • Application
  • Experimental

Cite this

Tillich, S., & Großschädl, J. (2007). VLSI Implementation of a Functional Unit to Accelerate ECC and AES on 32-bit Processors. In C. Carlet (Ed.), Arithmetic of Finite Fields, First International Workshop, WAIFI 2007, Madrid, Spain, June 2007, Proceedings (Vol. 4547, pp. 40-54). (Lecture Notes in Computer Science). Berlin: Springer Verlag. https://doi.org/10.1007/978-3-540-73074-3_5

VLSI Implementation of a Functional Unit to Accelerate ECC and AES on 32-bit Processors. / Tillich, Stefan; Großschädl, Johann.

Arithmetic of Finite Fields, First International Workshop, WAIFI 2007, Madrid, Spain, June 2007, Proceedings. ed. / Claude Carlet. Vol. 4547 Berlin : Springer Verlag, 2007. p. 40-54 (Lecture Notes in Computer Science).

Research output: Chapter in Book/Report/Conference proceedingConference contributionResearchpeer-review

Tillich, S & Großschädl, J 2007, VLSI Implementation of a Functional Unit to Accelerate ECC and AES on 32-bit Processors. in C Carlet (ed.), Arithmetic of Finite Fields, First International Workshop, WAIFI 2007, Madrid, Spain, June 2007, Proceedings. vol. 4547, Lecture Notes in Computer Science, Springer Verlag, Berlin, pp. 40-54, International Workshop on the Arithmetic of Finite Fields, Madrid, Spain, 21/06/07. https://doi.org/10.1007/978-3-540-73074-3_5
Tillich S, Großschädl J. VLSI Implementation of a Functional Unit to Accelerate ECC and AES on 32-bit Processors. In Carlet C, editor, Arithmetic of Finite Fields, First International Workshop, WAIFI 2007, Madrid, Spain, June 2007, Proceedings. Vol. 4547. Berlin: Springer Verlag. 2007. p. 40-54. (Lecture Notes in Computer Science). https://doi.org/10.1007/978-3-540-73074-3_5
Tillich, Stefan ; Großschädl, Johann. / VLSI Implementation of a Functional Unit to Accelerate ECC and AES on 32-bit Processors. Arithmetic of Finite Fields, First International Workshop, WAIFI 2007, Madrid, Spain, June 2007, Proceedings. editor / Claude Carlet. Vol. 4547 Berlin : Springer Verlag, 2007. pp. 40-54 (Lecture Notes in Computer Science).
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