Ultra-Low-Power Sub-1 V 29 ppm/°C Voltage Reference and Shared-Resistive Current Reference

This paper presents a curvature-compensated sub-1V voltage reference (VR) and a shared-resistive nanoampere current reference (CR) in a 130 nm CMOS process. The CR is used to generate a bipolar junction transistor complementary-to-absolute-temperature voltage, which is summed up with a proportional-to-absolute-temperature voltage generated using a summing network of PMOS gate-coupled pairs. The measured output voltage and current references from 10 chips (<inline-formula> <tex-math notation="LaTeX">$V_{\mathrm{REF}}$</tex-math> </inline-formula> and <inline-formula> <tex-math notation="LaTeX">$I_{\mathrm{REF}}$</tex-math> </inline-formula>) at room temperature are 469 mV and 1.86 nA, respectively. The measured average temperature coefficient of <inline-formula> <tex-math notation="LaTeX">$V_{\mathrm{REF}}$</tex-math> </inline-formula> and <inline-formula> <tex-math notation="LaTeX">$I_{\mathrm{REF}}$</tex-math> </inline-formula> are 29 ppm<inline-formula> <tex-math notation="LaTeX">$/^\circ$</tex-math> </inline-formula>C and 822 ppm<inline-formula> <tex-math notation="LaTeX">$/^\circ$</tex-math> </inline-formula>C over a temperature range from <inline-formula> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula>40<inline-formula> <tex-math notation="LaTeX">$^\circ$</tex-math> </inline-formula>C to 120<inline-formula> <tex-math notation="LaTeX">$^\circ$</tex-math> </inline-formula>C. The minimum supply voltage of the voltage-current reference is 0.95 V, and the total power consumption is 30 nW.