The Evolution of Transient-Execution Attacks

Research output: Chapter in Book/Report/Conference proceedingConference contribution


Historically, non-architectural state was considered non-observable. Side-channel attacks, in particular on caches, already showed that this is not entirely correct and meta-information, such as the cache state, can be extracted. Transient-execution attacks emerged when multiple groups discovered the exploitability of speculative execution and, simultaneously, the exploitability of deferred permission checks in modern out-of-order processors. These attacks are called transient as they exploit that the processor first executes operations that are then reverted as if they were never executed. However, on the microarchitectural level, these operations and their effects can be observed. While side-channel attacks enable and exploit direct access to meta-data from other security domains,
transient-execution attacks enable and exploit direct access to actual data from other security domains. In this paper, we show how the transient-execution landscape evolved since the initial discoveries. We show that the understanding and systematic view of the field has advanced and now facilitate the discovery of new attack variants.
Original languageEnglish
Title of host publicationGLSVLSI 2020 - Proceedings of the 30th Great Lakes Symposium on VLSI 2020
Publication statusAccepted/In press - 7 Sep 2020
EventGLSVLSI 2020: 30th ACM Great Lakes Symposium on VLSI - Virtuell, China
Duration: 8 Sep 202011 Sep 2020


ConferenceGLSVLSI 2020


  • transient execution
  • Meltdown
  • Spectre
  • LVI

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    Canella, C. A., Khasawneh, K. N., & Gruß, D. (Accepted/In press). The Evolution of Transient-Execution Attacks. In GLSVLSI 2020 - Proceedings of the 30th Great Lakes Symposium on VLSI 2020 ACM/IEEE.