Abstract
This paper introduces an improved electrostatic discharge (ESD) system-level transient simulation modeling method and discusses its validation using IEC 61000-4-2 ESD pulses on a real-world product. The system model is composed of high current and broadband (up to 3 GHz) models of R, L, C, ferrite beads, diodes, and integrated circuit IO pins. A complex return path model is the key to correctly model the system's response to the IEC excitation. The model includes energy-limited time-dependent IC damage models. A power-time integral method is introduced to accurately determine if a junction would experience thermal runaway under an arbitrary injection waveform. The proposed method does not require knowledge of the junction's microscopic geometry, material information, defect location, or melting temperature.
Original language | English |
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Article number | 7217815 |
Pages (from-to) | 1208-1308 |
Number of pages | 101 |
Journal | IEEE Transactions on Electromagnetic Compatibility |
Volume | 57 |
Issue number | 6 |
DOIs | |
Publication status | Published - 1 Dec 2015 |
Externally published | Yes |
Keywords
- Common mode
- electromagnetic compatibility (EMC)
- electrostatic discharge (ESD)
- human machine model (HMM)
- IEC 61000-4-2
- system efficient ESD design (SEED)
- transmission line pulser (TLP)
ASJC Scopus subject areas
- Atomic and Molecular Physics, and Optics
- Condensed Matter Physics
- Electrical and Electronic Engineering