System-level design for ESD protection on multiple IO interfaces

Pengyu Wei, Javad Meiguni, David Pommerenke

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper introduces the application of system-efficient ESD design (SEED) to ESD-induced pulses that are typical for system-level ESD. Emphasis is given to USB connectors because it has been shown that discharges to the connector shell will not lead to damaging current levels; however, the current levels are sufficient to cause soft-failures and possibly lead to latch-up of the USB IC.

Original languageEnglish
Title of host publication2018 IEEE International Reliability Physics Symposium, IRPS 2018
PublisherInstitute of Electrical and Electronics Engineers
Pages2C.11-2C.18
ISBN (Electronic)9781538654798
DOIs
Publication statusPublished - 25 May 2018
Externally publishedYes
Event2018 IEEE International Reliability Physics Symposium, IRPS 2018 - Burlingame, United States
Duration: 11 Mar 201815 Mar 2018

Publication series

NameIEEE International Reliability Physics Symposium Proceedings
Volume2018-March
ISSN (Print)1541-7026

Conference

Conference2018 IEEE International Reliability Physics Symposium, IRPS 2018
CountryUnited States
CityBurlingame
Period11/03/1815/03/18

Keywords

  • Electrostatic discharge (ESD)
  • snapback
  • SPICE modeling
  • system-efficient ESD design (SEED)
  • transient voltage suppressor (TVS)

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Wei, P., Meiguni, J., & Pommerenke, D. (2018). System-level design for ESD protection on multiple IO interfaces. In 2018 IEEE International Reliability Physics Symposium, IRPS 2018 (pp. 2C.11-2C.18). (IEEE International Reliability Physics Symposium Proceedings; Vol. 2018-March). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/IRPS.2018.8353547