Switched Capacitor DC-DC Converter in 65nm CMOS Technology with a Peak Efficiency of 97%

Thomas Santa, Mario Auer, Christoph Sandner, Christian Lindholm

Research output: Contribution to conferencePaper

Abstract

This paper presents a highly efficient switched capacitor (SC) DC-DC converter, which is implemented in a 65nm low power CMOS process to enable SoC integration. The converter supplies a nominal output current of 30mA with an efficiency of 95%. The buck converter operates with a constant input voltage of 1.83V and produces an output voltage of 1.2V. The charge is transported in two phases from the input supply to the output capacitor. Therefore, a network consisting of switches and two so-called flying capacitors are used. This converter is intended to be used in power management units for mobile devices and to substitute complex and expensive inductor based DC-DC converters. A test chip was designed in collaboration with Infineon Technologies Austria AG. The measurement results are presented and give for an output current of 10mA a peak efficiency of 97%.
Original languageEnglish
Pages1351-1354
Number of pages4
Publication statusPublished - 2011
Event The IEEE International Symposium on Circuits and Systems (ISCAS) 2011 - Rio de Janeiro, Brazil
Duration: 15 May 201118 May 2011
http://www.fpl.uni-kl.de/rio/www.iscas2011.org/index.htm

Conference

Conference The IEEE International Symposium on Circuits and Systems (ISCAS) 2011
CountryBrazil
CityRio de Janeiro
Period15/05/1118/05/11
Internet address

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    Santa, T., Auer, M., Sandner, C., & Lindholm, C. (2011). Switched Capacitor DC-DC Converter in 65nm CMOS Technology with a Peak Efficiency of 97%. 1351-1354. Paper presented at The IEEE International Symposium on Circuits and Systems (ISCAS) 2011, Rio de Janeiro, Brazil.