Security Improvement in Embedded Systems via an Efficient Hardware Bound Checking Architecture

Michael Georg Grasser

doi:10.1108/17440080710829270

Security Improvement in Embedded Systems via an Efficient Hardware Bound Checking Architecture

Michael Georg Grasser

Institute of Technical Informatics (4480)

Research output: Contribution to journal › Article › peer-review

Original language	English
Pages (from-to)	153-172
Journal	International Journal of Web Information Systems
Volume	3
Issue number	1/2
DOIs	https://doi.org/10.1108/17440080710829270
Publication status	Published - 2007

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10.1108/17440080710829270

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Security Improvement in Embedded Systems via an Efficient Hardware Bound Checking Architecture

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SecureCPU - Improving Code-Security by Extension of CPU-Registers

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Security Improvement in Embedded Systems via an Efficient Hardware Bound Checking Architecture

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SecureCPU - Improving Code-Security by Extension of CPU-Registers

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