Reducing the communication bottleneck via on-chip cosimulation of gate-level hdl and c-models on a hardware accelerator

Alexander Maili, Christian Steger, Reinhold Weiß, Rob Quigley, Damian Dalton

Institute of Technical Informatics (4480)

Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review

1 results

Active
Hardware/Software-Codesign
Steger, C., Seifert, C., Stelzer, P., Fiala, G. & Basic, F.
1/01/95 → …
Project: Research area