Abstract
Dense integration and high operating frequencies associated with increased number of I/O buffers of FPGAs are factors contributing to electromagnetic emission (EME) increase. Consequently the radiation issue that used to be discussed at PCB level has shifted to component level. Thus it is of high interest and challenging to investigate chip electromagnetic performance. This paper presents a preliminary analysis about the impact of the placement and routing (PR) process of logic inside the FPGA on the chip EME level. With this purpose, a softcore processor was placed and routed based on three different strategies in the configurable logic block (CLB) array of a commercial FPGA and executed an application code running over an operating system (OS). Three experiments based on far- and near-field emission measurements have been performed.-The obtained results indicate that the EME level can be affected up to 21.8% by the way the processor is placed and routed inside the FPGA.
Original language | English |
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Title of host publication | 2021 Argentine Conference on Electronics - Congreso Argentino de Electronica 2021, CAE 2021 |
Publisher | Institute of Electrical and Electronics Engineers |
Pages | 88-92 |
Number of pages | 5 |
ISBN (Electronic) | 9781728175799 |
DOIs | |
Publication status | Published - 11 Mar 2021 |
Event | 2021 Argentine Conference on Electronics - Bahia Blanca, Virtuell, Argentina Duration: 11 Mar 2021 → 12 Mar 2021 |
Conference
Conference | 2021 Argentine Conference on Electronics |
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Abbreviated title | CAE 2021 |
Country/Territory | Argentina |
City | Virtuell |
Period | 11/03/21 → 12/03/21 |
Keywords
- Commercial Field-Programmable Gate Array (FPGA)
- Electromagnetic emission (EME)
- GTEM Cell Test Method
- Logic place and route process
- Reliability
- Surface Scan Test Method
ASJC Scopus subject areas
- Energy Engineering and Power Technology
- Electrical and Electronic Engineering
- Instrumentation
Fields of Expertise
- Information, Communication & Computing