Multi-Gigabit GCM-AES Architecture Optimized for FPGAs

Stefan Lemsitzer; Johannes Wolkerstorfer; Norbert Felber; Matthias Brändli

Multi-Gigabit GCM-AES Architecture Optimized for FPGAs

Stefan Lemsitzer, Johannes Wolkerstorfer, Norbert Felber, Matthias Brändli

Institute of Applied Information Processing and Communications (7050)

Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review

Original language	English
Title of host publication	Proceedings of Workshop on Cryptographic Hardware and Embedded Systems 2007
Place of Publication	Berlin
Publisher	Springer
Pages	227-238
Volume	4727
ISBN (Print)	978-3-540-74734-5
Publication status	Published - 2007
Event	Cryptographic Hardware and Embedded Systems - CHES 2005 - Vienna Duration: 31 Aug 2005 → 13 Sep 2007

Publication series

Name	Lecture Notes on Computer Science
Publisher	Springer

Conference

Conference	Cryptographic Hardware and Embedded Systems - CHES 2005
City	Vienna
Period	31/08/05 → 13/09/07

Treatment code (Nähere Zuordnung)

Application
Theoretical
Experimental

Cite this

Multi-Gigabit GCM-AES Architecture Optimized for FPGAs. / Lemsitzer, Stefan; Wolkerstorfer, Johannes; Felber, Norbert et al.

Proceedings of Workshop on Cryptographic Hardware and Embedded Systems 2007. Vol. 4727 Berlin : Springer, 2007. p. 227-238 (Lecture Notes on Computer Science).

Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review

@inproceedings{76bf9a2e575949fb82c10d0c59930da5,

title = "Multi-Gigabit GCM-AES Architecture Optimized for FPGAs",

author = "Stefan Lemsitzer and Johannes Wolkerstorfer and Norbert Felber and Matthias Br{\"a}ndli",

year = "2007",

language = "English",

isbn = "978-3-540-74734-5",

volume = "4727",

series = "Lecture Notes on Computer Science",

publisher = "Springer",

pages = "227--238",

booktitle = "Proceedings of Workshop on Cryptographic Hardware and Embedded Systems 2007",

note = "Cryptographic Hardware and Embedded Systems - CHES 2005 ; Conference date: 31-08-2005 Through 13-09-2007",

}

TY - GEN

T1 - Multi-Gigabit GCM-AES Architecture Optimized for FPGAs

AU - Lemsitzer, Stefan

AU - Wolkerstorfer, Johannes

AU - Felber, Norbert

AU - Brändli, Matthias

PY - 2007

Y1 - 2007

UR - http://www.springerlink.com/content/h76h24572751/

M3 - Conference paper

SN - 978-3-540-74734-5

VL - 4727

T3 - Lecture Notes on Computer Science

SP - 227

EP - 238

BT - Proceedings of Workshop on Cryptographic Hardware and Embedded Systems 2007

PB - Springer

CY - Berlin

T2 - Cryptographic Hardware and Embedded Systems - CHES 2005

Y2 - 31 August 2005 through 13 September 2007

ER -

Multi-Gigabit GCM-AES Architecture Optimized for FPGAs

Publication series

Conference

Treatment code (Nähere Zuordnung)

Other files and links

VLSI Design

Cite this

Multi-Gigabit GCM-AES Architecture Optimized for FPGAs

Publication series

Conference

Treatment code (Nähere Zuordnung)

Other files and links

Projects

VLSI Design

Cite this