Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors

Stefan Tillich, Johann Großschädl

Research output: Chapter in Book/Report/Conference proceedingConference contributionResearchpeer-review

Original languageEnglish
Title of host publicationCryptographic Hardware and Embedded Systems — CHES 2006
EditorsLouis Goubin, Mitsuru Matsui
Place of PublicationBerlin
PublisherSpringer Verlag
Pages270-284
Volume4249
ISBN (Print)978-3-540-46559-1
DOIs
Publication statusPublished - 2006
EventCHES - Yokohama, Japan
Duration: 10 Oct 200613 Oct 2006

Publication series

NameLecture Notes in Computer Science
PublisherSpringer Verlag

Conference

ConferenceCHES
CountryJapan
CityYokohama
Period10/10/0613/10/06

Treatment code (Nähere Zuordnung)

  • Application
  • Experimental

Cite this

Tillich, S., & Großschädl, J. (2006). Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors. In L. Goubin, & M. Matsui (Eds.), Cryptographic Hardware and Embedded Systems — CHES 2006 (Vol. 4249, pp. 270-284). (Lecture Notes in Computer Science). Berlin: Springer Verlag. https://doi.org/10.1007/11894063_22