Generalized Execution Time Estimation

Andreas Rechberger, Eugen Brenner

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

While developing embedded devices a significant challenge is to choose the appropriate computing architecture. Especially during early design stages providing measurable metric on the performance demands to implement a specified algorithm is required. Usually this includes a large amount of target dependency, like the chosen micro-controller platform. This work aims on providing a generalized method to estimate the processing time of a dedicated algorithm, when being run on a variety of hardware choices. The focus is on a fast exploration of the hardware design space in order to provide guidance for selecting a suitable processing platform.

Original languageEnglish
Title of host publication2018 IEEE 13th International Symposium on Industrial Embedded Systems, SIES 2018 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers
ISBN (Print)9781538641552
DOIs
Publication statusPublished - 20 Aug 2018
Event13th IEEE International Symposium on Industrial Embedded Systems, SIES 2018 - Graz, Austria
Duration: 6 Jun 20188 Jun 2018

Conference

Conference13th IEEE International Symposium on Industrial Embedded Systems, SIES 2018
CountryAustria
CityGraz
Period6/06/188/06/18

Keywords

  • algorithm
  • compiler
  • data flow
  • performance estimation

ASJC Scopus subject areas

  • Computer Science Applications
  • Hardware and Architecture
  • Industrial and Manufacturing Engineering

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