FPGA-Based Debugging with Dynamic Signal Selection at Run-Time

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

For the development of FPGA-based automotive systems, debugging of internal signals is necessary to detect errors or to analyze/visualize the operation of the field programmable gate array (FPGA) at runtime. Often, so called ”debug cores” of the FPGA vendor are used for debugging. Xilinx Vivado is a development environment offering an integrated logic analyzer for statically selected signals. However, each time these input signals shall be changed, the whole workflow (synthesis, placement, routing and generation of the bit stream) must be repeated, which is very time consuming. The scope of the present work is to develop a custom and more flexible FPGA-based logic debugger: The Advanced Inverter Debugger (AID) is a logic component, integrated into the system under development, that can dynamically select signals for the debugging process at run-time. The debugging process is controlled by a user interface at a workstation, communicating via UDP/IP over Ethernet. The AID is configurable with regard to start/stop triggers and sample rate for each signal, and allows long-term recording as well as visualization at the workstation. For convenient use in the development of automotive control systems, the AID is available as Matlab component for integration into and synthesis with the target system.
Original languageEnglish
Title of host publication17th Workshop on Automotive Software Engineering (ASE 2020)
Number of pages7
Publication statusPublished - 1 Jan 2020
Event17. Automotive Software Engineering Workshop 2020 - Innsbruck, Austria
Duration: 24 Feb 202024 Feb 2020
https://sites.google.com/view/ase2020/call-for-papers

Publication series

NameCEUR Workshop Proceedings
PublisherRWTH Aachen
Volume2581
ISSN (Print)1613-0073

Workshop

Workshop17. Automotive Software Engineering Workshop 2020
Abbreviated titleASE
CountryAustria
CityInnsbruck
Period24/02/2024/02/20
Internet address

Keywords

  • automotive
  • debugging
  • FPGA
  • Debugging
  • Automotive

ASJC Scopus subject areas

  • Computer Science(all)

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  • Activities

    • 1 Workshop, seminar or course (Participation in/Organisation of)
    • 1 Talk at workshop, seminar or course

    17. Automotive Software Engineering Workshop 2020

    Gernot Fiala (Participant)
    24 Feb 2020

    Activity: Participation in or organisation ofWorkshop, seminar or course (Participation in/Organisation of)

    FPGA-Based Debugging with Dynamic Signal Selection at Run-Time

    Gernot Fiala (Speaker)
    24 Feb 2020

    Activity: Talk or presentationTalk at workshop, seminar or courseScience to science

    Cite this

    Fiala, G., Scheipel, T. P., Neuwirth, W., & Baunach, M. C. (2020). FPGA-Based Debugging with Dynamic Signal Selection at Run-Time. In 17th Workshop on Automotive Software Engineering (ASE 2020) (CEUR Workshop Proceedings; Vol. 2581).