Activities per year
For the development of FPGA-based automotive systems, debugging of internal signals is necessary to detect errors or to analyze/visualize the operation of the field programmable gate array (FPGA) at runtime. Often, so called ”debug cores” of the FPGA vendor are used for debugging. Xilinx Vivado is a development environment offering an integrated logic analyzer for statically selected signals. However, each time these input signals shall be changed, the whole workflow (synthesis, placement, routing and generation of the bit stream) must be repeated, which is very time consuming. The scope of the present work is to develop a custom and more flexible FPGA-based logic debugger: The Advanced Inverter Debugger (AID) is a logic component, integrated into the system under development, that can dynamically select signals for the debugging process at run-time. The debugging process is controlled by a user interface at a workstation, communicating via UDP/IP over Ethernet. The AID is configurable with regard to start/stop triggers and sample rate for each signal, and allows long-term recording as well as visualization at the workstation. For convenient use in the development of automotive control systems, the AID is available as Matlab component for integration into and synthesis with the target system.
|Title of host publication||17th Workshop on Automotive Software Engineering (ASE 2020)|
|Number of pages||7|
|Publication status||Published - 1 Jan 2020|
|Event||17. Automotive Software Engineering Workshop 2020 - Innsbruck, Austria|
Duration: 24 Feb 2020 → 24 Feb 2020
|Name||CEUR Workshop Proceedings|
|Workshop||17. Automotive Software Engineering Workshop 2020|
|Period||24/02/20 → 24/02/20|
ASJC Scopus subject areas
- Computer Science(all)
Fiala, G., Scheipel, T. P., Neuwirth, W., & Baunach, M. C. (2020). FPGA-Based Debugging with Dynamic Signal Selection at Run-Time. In 17th Workshop on Automotive Software Engineering (ASE 2020) (CEUR Workshop Proceedings; Vol. 2581).