Fixing Faults in VHDL-RTL Programs: An Application of Model-based Diagnosis to Digital Circuit Design

Research output: Contribution to journalArticleResearch

Original languageEnglish
Pages (from-to)6-17
JournalÖGAI-Journal
Volume21
Issue number4
Publication statusPublished - 2001

Treatment code (Nähere Zuordnung)

  • Basic - Fundamental (Grundlagenforschung)

Cite this

Fixing Faults in VHDL-RTL Programs: An Application of Model-based Diagnosis to Digital Circuit Design. / Peischl, Bernhard; Wotawa, Franz.

In: ÖGAI-Journal, Vol. 21, No. 4, 2001, p. 6-17.

Research output: Contribution to journalArticleResearch

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author = "Bernhard Peischl and Franz Wotawa",
year = "2001",
language = "English",
volume = "21",
pages = "6--17",
journal = "{\"O}GAI-Journal",
issn = "0254-4326",
publisher = "Austrian Society for Artificial Intelligency",
number = "4",

}

TY - JOUR

T1 - Fixing Faults in VHDL-RTL Programs: An Application of Model-based Diagnosis to Digital Circuit Design

AU - Peischl, Bernhard

AU - Wotawa, Franz

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Y1 - 2001

M3 - Article

VL - 21

SP - 6

EP - 17

JO - ÖGAI-Journal

JF - ÖGAI-Journal

SN - 0254-4326

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ER -