Finding the root cause of an ESD upset event

David Pommerenke*, Jayong Koo, Giorgi Muchaidze

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

System level Electrostatic Discharges (ESD) can lead to soft-errors (e.g., bit-errors, wrong resets etc.). By this talk we try to offer guidance in finding the root cause of upsets frequently observed in immunity testing (e.g., ESD, EFT). At first a description of the ESD discharge process is given. It provides the necessary background for correctly analyzing ESD failures. Local scanning and in-circuit measurement techniques are explained. Further, it is shown how PCB scanning results, revealing local sensitivities, can be used for the characterization and optimization of circuit and ICs design and software for minimizing unwanted responses to soft-error causing noise. A series of measurements of such noise voltages coupled into a sensitive trace are presented.

Original languageEnglish
Title of host publicationInternational Engineering Consortium - DesignCon 2006
Pages1673-1696
Number of pages24
Publication statusPublished - 1 Dec 2006
Externally publishedYes
EventDesignCon 2006 - Santa Clara, CA, United States
Duration: 6 Feb 20069 Feb 2006

Publication series

NameInternational Engineering Consortium - DesignCon 2006
Volume3

Conference

ConferenceDesignCon 2006
CountryUnited States
CitySanta Clara, CA
Period6/02/069/02/06

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering

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