Efficient FPGA Implementations of LowMC and Picnic

Research output: Chapter in Book/Report/Conference proceedingConference contributionResearchpeer-review

Abstract

Post-quantum cryptography has received increased attention in recent years, in particular, due to the standardization effort by NIST. One of the second-round candidates in the NIST post-quantum standardization project is Picnic, a post-quantum secure signature scheme based on efficient zero-knowledge proofs of knowledge. In this work, we present the first FPGA implementation of Picnic. We show how to efficiently calculate LowMC, the block cipher used as a one-way function in Picnic, in hardware despite the large number of constants needed during computation. We then combine our LowMC implementation and efficient instantiations of Keccak to build the full Picnic algorithm. Additionally, we conform to recently proposed hardware interfaces for post-quantum schemes to enable easier comparisons with other designs. We provide evaluations of our Picnic implementation for both, the standalone design and a version wrapped with a PCIe interface, and compare them to the state-of-the-art software implementations of Picnic and similar hardware designs. Concretely, signing messages on our FPGA takes 0.25 ms for the L1 security level and 1.24 ms for the L5 security level, beating existing optimized software implementations by a factor of 4.
Original languageEnglish
Title of host publicationTopics in Cryptology – CT-RSA 2020
Subtitle of host publicationThe Cryptographers’ Track at the RSA Conference 2020, San Francisco, CA, USA, February 24–28, 2020, Proceedings
EditorsStanislaw Jarecki
Place of PublicationSan Francisco, CA, USA
PublisherSpringer
Publication statusAccepted/In press - 2019

Fingerprint

Field programmable gate arrays (FPGA)
Hardware
Standardization
Quantum cryptography

Keywords

  • digital signatures
  • NIST PQC
  • PICNIC signature scheme
  • FPGA
  • implementation

Cite this

Kales, D., Ramacher, S., Rechberger, C., Walch, R., & Werner, M. (Accepted/In press). Efficient FPGA Implementations of LowMC and Picnic. In S. Jarecki (Ed.), Topics in Cryptology – CT-RSA 2020: The Cryptographers’ Track at the RSA Conference 2020, San Francisco, CA, USA, February 24–28, 2020, Proceedings San Francisco, CA, USA: Springer.

Efficient FPGA Implementations of LowMC and Picnic. / Kales, Daniel; Ramacher, Sebastian; Rechberger, Christian; Walch, Roman; Werner, Mario.

Topics in Cryptology – CT-RSA 2020: The Cryptographers’ Track at the RSA Conference 2020, San Francisco, CA, USA, February 24–28, 2020, Proceedings. ed. / Stanislaw Jarecki. San Francisco, CA, USA : Springer, 2019.

Research output: Chapter in Book/Report/Conference proceedingConference contributionResearchpeer-review

Kales, D, Ramacher, S, Rechberger, C, Walch, R & Werner, M 2019, Efficient FPGA Implementations of LowMC and Picnic. in S Jarecki (ed.), Topics in Cryptology – CT-RSA 2020: The Cryptographers’ Track at the RSA Conference 2020, San Francisco, CA, USA, February 24–28, 2020, Proceedings. Springer, San Francisco, CA, USA.
Kales D, Ramacher S, Rechberger C, Walch R, Werner M. Efficient FPGA Implementations of LowMC and Picnic. In Jarecki S, editor, Topics in Cryptology – CT-RSA 2020: The Cryptographers’ Track at the RSA Conference 2020, San Francisco, CA, USA, February 24–28, 2020, Proceedings. San Francisco, CA, USA: Springer. 2019
Kales, Daniel ; Ramacher, Sebastian ; Rechberger, Christian ; Walch, Roman ; Werner, Mario. / Efficient FPGA Implementations of LowMC and Picnic. Topics in Cryptology – CT-RSA 2020: The Cryptographers’ Track at the RSA Conference 2020, San Francisco, CA, USA, February 24–28, 2020, Proceedings. editor / Stanislaw Jarecki. San Francisco, CA, USA : Springer, 2019.
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