Effects of TVS integration on system level ESD robustness

Wei Huang*, Jeffrey Dunnihoo, David Pommerenke

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Higher integration of Transient Voltage Suppression (TVS) functionality into ASIC I/O cells implies lower system costs. But as the ESD pulse is directed deeper into the system, migrating the TVS clamping function from the periphery of the system to a central ASIC may actually reduce the system's ESD robustness. ESD current reconstruction scanning can be used to trace the current path on a PCB, and possibly within an IC. The article compares the current spreading during and ESD for different ESD protection methods.

Original languageEnglish
Title of host publicationElectrical Overstress/Electrostatic Discharge Symposium Proceedings 2010, EOS/ESD 2010
Publication statusPublished - 24 Dec 2010
Externally publishedYes
Event32nd Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2010 - Reno, NV, United States
Duration: 3 Oct 20108 Oct 2010

Publication series

NameElectrical Overstress/Electrostatic Discharge Symposium Proceedings
ISSN (Print)0739-5159

Conference

Conference32nd Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2010
CountryUnited States
CityReno, NV
Period3/10/108/10/10

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • Cite this

    Huang, W., Dunnihoo, J., & Pommerenke, D. (2010). Effects of TVS integration on system level ESD robustness. In Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2010, EOS/ESD 2010 [5623717] (Electrical Overstress/Electrostatic Discharge Symposium Proceedings).