Design and Performance Considerations for an On-Chip Jitter Analysis System

Stefan Erb, Wolfgang Pribyl

Research output: Chapter in Book/Report/Conference proceedingConference contributionResearchpeer-review

Original languageEnglish
Title of host publicationProceedings of 2010 IEEE International Symposium on Circuits and Systems
Publisher.
Pages3969-3972
DOIs
Publication statusPublished - 2010
EventInternational Symposium on Circuits and Systems (ISCAS) - Paris, France
Duration: 30 May 20102 Jun 2010

Conference

ConferenceInternational Symposium on Circuits and Systems (ISCAS)
CountryFrance
CityParis
Period30/05/102/06/10

Treatment code (Nähere Zuordnung)

  • Application
  • Theoretical

Cite this

Erb, S., & Pribyl, W. (2010). Design and Performance Considerations for an On-Chip Jitter Analysis System. In Proceedings of 2010 IEEE International Symposium on Circuits and Systems (pp. 3969-3972). .. https://doi.org/10.1109/ISCAS.2010.5537662