Combining a gate-level accelerator with an on-chip processor to reduce the communication bottleneck

Alexander Maili, Christian Steger, Reinhold Weiß, Damian Dalton

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Hardware/Software-Codesign
Pieber, T. W., Steger, C., Weiß, R., Ulz, T., Schachner, M., Kreiner, C. J., Plank, H., Troyer, M., Gressl, L. A., Seifert, C., Warmer, F., Rech, A., Erb, M., Scherr, F., Kammerer, M., Stelzer, P., Frewein, A., Strasser, A., Lindner, J., Ess, A., Feldbacher, M. & Weissteiner, H.
1/01/95 → …
Project: Research area

Cite this

@inproceedings{bdc46421b8d94378abcb73b8b92f9443,

title = "Combining a gate-level accelerator with an on-chip processor to reduce the communication bottleneck",

author = "Alexander Maili and Christian Steger and Reinhold Wei{\ss} and Damian Dalton",

year = "2005",

language = "English",

pages = "199--206",

booktitle = "Austrochip",

publisher = ".",

}