| Original language | English |
|---|---|
| Title of host publication | Austrochip |
| Publisher | . |
| Pages | 199-206 |
| Publication status | Published - 2005 |
Cite this
Maili, A., Steger, C., Weiß, R., & Dalton, D. (2005). Combining a gate-level accelerator with an on-chip processor to reduce the communication bottleneck. In Austrochip (pp. 199-206). ..
Combining a gate-level accelerator with an on-chip processor to reduce the communication bottleneck. / Maili, Alexander; Steger, Christian; Weiß, Reinhold; Dalton, Damian.
Austrochip. ., 2005. p. 199-206.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Research › peer-review
Maili, A, Steger, C, Weiß, R & Dalton, D 2005, Combining a gate-level accelerator with an on-chip processor to reduce the communication bottleneck. in Austrochip. ., pp. 199-206.
Maili A, Steger C, Weiß R, Dalton D. Combining a gate-level accelerator with an on-chip processor to reduce the communication bottleneck. In Austrochip. . 2005. p. 199-206
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