The number of Commercial-Off-The-Shelf (COTS) microprocessors and microcontrollers used in safety applications increased significantly over the last decade. In contrast to safety-certified microcontrollers, these microcontrollers are not produced with integrated protection against memory soft errors and limited in terms of available memory and computation power. However, due to the constant optimizations of the memory's physical size and the voltage margins, the probability that external factors, such as magnetic fields or cosmic rays, temporally alter a memory state (and thus cause a soft error) rises. Especially within safety-critical automation systems, it is crucial to address such errors and a wide range of error mitigation strategies have been proposed. In the context of established brownfield automation systems, the redesign and deployment of new hardware is usually not feasible. Therefore software-based strategies are required, which can be deployed on existing fail-safe architectures to further improve their performances, without requiring their rework or conceptual changes. This article identifies challenges associated with software-based soft error detection and correction strategies. Along with the challenges, a short overview of currently applicable software-based mitigation strategies is given and the strategies are evaluated.
|Title of host publication||PESARO 2020, The Tenth International Conference on Performance, Safety and Robustness in Complex Systems and Applications|
|Place of Publication||Lisbon, Portugal|
|Number of pages||6|
|Publication status||Published - 23 Feb 2020|
|Event||Tenth International Conference on Performance, Safety and Robustness in Complex Systems and Applications - Lisbon, Portugal|
Duration: 23 Feb 2020 → 27 Feb 2020
|Conference||Tenth International Conference on Performance, Safety and Robustness in Complex Systems and Applications|
|Abbreviated title||PESARO 2020|
|Period||23/02/20 → 27/02/20|
- soft errors
- Embedded memory
- Redundant Parity
Kajmakovic, A., Diwold, K., Kajtazovic, N., & Zupanc, R. (2020). Challenges in Mitigating Soft Errors in Safety-critical Systems with COTS Microprocessors. In C-P. Rückemann (Ed.), PESARO 2020, The Tenth International Conference on Performance, Safety and Robustness in Complex Systems and Applications (pp. 13-18). Lisbon, Portugal: IARIA.