Automated Debugging of Verilog Designs

Research output: Contribution to journalArticleResearchpeer-review

Original languageEnglish
Pages (from-to)695-723
JournalInternational journal of software engineering and knowledge engineering
Volume22
Issue number5
DOIs
Publication statusPublished - 2012

Fields of Expertise

  • Information, Communication & Computing

Treatment code (Nähere Zuordnung)

  • Basic - Fundamental (Grundlagenforschung)
  • Experimental

Cite this

Automated Debugging of Verilog Designs. / Peischl, Bernhard; Riaz, Naveed; Wotawa, Franz.

In: International journal of software engineering and knowledge engineering, Vol. 22, No. 5, 2012, p. 695-723.

Research output: Contribution to journalArticleResearchpeer-review

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DO - 10.1142/S0218194012500209

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JO - International journal of software engineering and knowledge engineering

JF - International journal of software engineering and knowledge engineering

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