Abstract
A comprehensive model of a clock line including large and small signal pin parameters, as well as channel parameters is presented. The small signal model allows analysis of in-band interference which can lead to soft failures, while large signal models allow for the simulation of current sharing between driver/receiver pin pairs.
Original language | English |
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Title of host publication | Electrical Overstress/Electrostatic Discharge Symposium Proceedings |
Volume | 2014-November |
Edition | November |
Publication status | Published - 26 Nov 2014 |
Externally published | Yes |
Event | 36th Annual Electrical Overstress/Electrostatic Discharge Symposium: EOS/ESD 2014 - Tucson, United States Duration: 7 Sept 2014 → 12 Sept 2014 |
Conference
Conference | 36th Annual Electrical Overstress/Electrostatic Discharge Symposium |
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Abbreviated title | EOS/ESD 2014 |
Country/Territory | United States |
City | Tucson |
Period | 7/09/14 → 12/09/14 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering