Abstract
Testing and debugging of electrostatic discharge (ESD) or electrical fast transient issues in modern electronic systems can be challenging. The following paper describes the design of an on-chip circuit that detects and stores the occurrence of a fast transient stress event at the ESD protection structures in an input/output pad. Measurements and simulations of a test chip in 90 nm technology show that this circuit can accurately detect and record the presence of a transient stress event with a peak current as low as 0.9 A or a duration as short as 1 ns, and that the detector works well across typical temperature and process variations. The small size of the detector allows it to be used effectively in low-cost commercial integrated circuits. The detector was tested in a system-level environment and successfully records transient events. The importance of simulating with intelligent approximations of the system parasitics is described and demonstrated in measurements. An improved detector is discussed, which performs better in terms of process variations.
Original language | English |
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Pages (from-to) | 1053-1060 |
Number of pages | 8 |
Journal | IEEE Transactions on Electromagnetic Compatibility |
Volume | 60 |
Issue number | 4 |
DOIs | |
Publication status | Published - 1 Aug 2018 |
Externally published | Yes |
Keywords
- Electrical fast transient (EFT)
- electrostatic discharge (ESD)
- ESD detectors
- on-chip measurements
- system-level ESD
ASJC Scopus subject areas
- Atomic and Molecular Physics, and Optics
- Condensed Matter Physics
- Electrical and Electronic Engineering