An architecture to enable on-chip cosimulation of ip-models with the apples gate-level accelerator

Alexander Maili, Christian Steger, Reinhold Weiß, Damian Dalton

Research output: Chapter in Book/Report/Conference proceedingConference paper

Original languageEnglish
Title of host publicationTelecommunications and Mobile Computing [Elektronische Ressource]
Publisher.
Publication statusSubmitted - 2005

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