A Class-D Amplifier with Digital PWM and Digital Loop-Filter using a Mixed-Signal Feedback Loop

Mario Auer, Timucin David Karaca

Research output: Chapter in Book/Report/Conference proceedingConference contributionResearchpeer-review

Abstract

A digital class-D audio amplifier is presented that is based on digital pulse-width modulation (PWM) and a com- bination of digital and analog feedback. Unlike other recent im- plementations for low-power applications this amplifier directly accepts digital input as the digital-to-analog conversion is an inherent feature of the presented topology.
The feedback topology uses a hybrid scheme with digital feedback to improve the performance of the PWM and analog- feedback to mitigate analog imperfections and to improve power supply rejection. Because of the proposed feedback scheme, the requirements on the analog-to-digital converter (ADC) in the feedback loop are greatly relaxed allowing the use of a continuous-time ∆Σ-modulator.
The class-D amplifier was realized in a standard 180nm CMOS technologies and drives 1.2W into an 8Ω load and achieves a total harmonic distortion plus noise (THD+N) of −96dB, a signal-to-noise ration (SNR) of 99.9dB having an efficiency of 91%.
Original languageEnglish
Title of host publicationProceedings of the 49th European Solid-State Circuits Conference
Publication statusAccepted/In press - Sep 2019
Event49th European Solid-State Circuits Conference -
Duration: 23 Sep 201926 Sep 2019
https://esscirc-essderc2019.org/

Conference

Conference49th European Solid-State Circuits Conference
Abbreviated titleESSCIRC
Period23/09/1926/09/19
Internet address

Fingerprint

Pulse width modulation
Feedback
Digital to analog conversion
Topology
Harmonic distortion
Modulators
Defects

Cite this

Auer, M., & Karaca, T. D. (Accepted/In press). A Class-D Amplifier with Digital PWM and Digital Loop-Filter using a Mixed-Signal Feedback Loop. In Proceedings of the 49th European Solid-State Circuits Conference

A Class-D Amplifier with Digital PWM and Digital Loop-Filter using a Mixed-Signal Feedback Loop. / Auer, Mario; Karaca, Timucin David.

Proceedings of the 49th European Solid-State Circuits Conference. 2019.

Research output: Chapter in Book/Report/Conference proceedingConference contributionResearchpeer-review

Auer, M & Karaca, TD 2019, A Class-D Amplifier with Digital PWM and Digital Loop-Filter using a Mixed-Signal Feedback Loop. in Proceedings of the 49th European Solid-State Circuits Conference. 49th European Solid-State Circuits Conference, 23/09/19.
Auer M, Karaca TD. A Class-D Amplifier with Digital PWM and Digital Loop-Filter using a Mixed-Signal Feedback Loop. In Proceedings of the 49th European Solid-State Circuits Conference. 2019
Auer, Mario ; Karaca, Timucin David. / A Class-D Amplifier with Digital PWM and Digital Loop-Filter using a Mixed-Signal Feedback Loop. Proceedings of the 49th European Solid-State Circuits Conference. 2019.
@inproceedings{ae83b6e86c7f498ebe01d2914e9fa322,
title = "A Class-D Amplifier with Digital PWM and Digital Loop-Filter using a Mixed-Signal Feedback Loop",
abstract = "A digital class-D audio amplifier is presented that is based on digital pulse-width modulation (PWM) and a com- bination of digital and analog feedback. Unlike other recent im- plementations for low-power applications this amplifier directly accepts digital input as the digital-to-analog conversion is an inherent feature of the presented topology.The feedback topology uses a hybrid scheme with digital feedback to improve the performance of the PWM and analog- feedback to mitigate analog imperfections and to improve power supply rejection. Because of the proposed feedback scheme, the requirements on the analog-to-digital converter (ADC) in the feedback loop are greatly relaxed allowing the use of a continuous-time ∆Σ-modulator.The class-D amplifier was realized in a standard 180nm CMOS technologies and drives 1.2W into an 8Ω load and achieves a total harmonic distortion plus noise (THD+N) of −96dB, a signal-to-noise ration (SNR) of 99.9dB having an efficiency of 91{\%}.",
author = "Mario Auer and Karaca, {Timucin David}",
year = "2019",
month = "9",
language = "English",
booktitle = "Proceedings of the 49th European Solid-State Circuits Conference",

}

TY - GEN

T1 - A Class-D Amplifier with Digital PWM and Digital Loop-Filter using a Mixed-Signal Feedback Loop

AU - Auer, Mario

AU - Karaca, Timucin David

PY - 2019/9

Y1 - 2019/9

N2 - A digital class-D audio amplifier is presented that is based on digital pulse-width modulation (PWM) and a com- bination of digital and analog feedback. Unlike other recent im- plementations for low-power applications this amplifier directly accepts digital input as the digital-to-analog conversion is an inherent feature of the presented topology.The feedback topology uses a hybrid scheme with digital feedback to improve the performance of the PWM and analog- feedback to mitigate analog imperfections and to improve power supply rejection. Because of the proposed feedback scheme, the requirements on the analog-to-digital converter (ADC) in the feedback loop are greatly relaxed allowing the use of a continuous-time ∆Σ-modulator.The class-D amplifier was realized in a standard 180nm CMOS technologies and drives 1.2W into an 8Ω load and achieves a total harmonic distortion plus noise (THD+N) of −96dB, a signal-to-noise ration (SNR) of 99.9dB having an efficiency of 91%.

AB - A digital class-D audio amplifier is presented that is based on digital pulse-width modulation (PWM) and a com- bination of digital and analog feedback. Unlike other recent im- plementations for low-power applications this amplifier directly accepts digital input as the digital-to-analog conversion is an inherent feature of the presented topology.The feedback topology uses a hybrid scheme with digital feedback to improve the performance of the PWM and analog- feedback to mitigate analog imperfections and to improve power supply rejection. Because of the proposed feedback scheme, the requirements on the analog-to-digital converter (ADC) in the feedback loop are greatly relaxed allowing the use of a continuous-time ∆Σ-modulator.The class-D amplifier was realized in a standard 180nm CMOS technologies and drives 1.2W into an 8Ω load and achieves a total harmonic distortion plus noise (THD+N) of −96dB, a signal-to-noise ration (SNR) of 99.9dB having an efficiency of 91%.

M3 - Conference contribution

BT - Proceedings of the 49th European Solid-State Circuits Conference

ER -