A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m)

Johann Großschädl

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Original languageEnglish
Title of host publicationCryptographic Hardware and Embedded Systems — CHES 2001
Place of PublicationBerlin
PublisherSpringer Verlag
Pages202-219
Volume2162
ISBN (Print)3-540-42521-7
Publication statusPublished - 2001
EventCHES - Boston, United States
Duration: 11 Aug 200413 Aug 2004

Publication series

NameLecture Notes in Computer Science
PublisherSpringer Verlag

Conference

ConferenceCHES
CountryUnited States
CityBoston
Period11/08/0413/08/04

Treatment code (Nähere Zuordnung)

  • Application
  • Experimental
  • VLSI Design

    Medwed, M., Wenger, E., Aigner, M. J., Posch, K., Hutter, M., Kirschbaum, M., Schmidt, J., Posch, R., Dominikus, S., Szekely, A., Feldhofer, M. & Plos, T.

    1/01/9515/07/19

    Project: Research area

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