A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m)

Johann Großschädl

Research output: Chapter in Book/Report/Conference proceedingConference contributionResearchpeer-review

Original languageEnglish
Title of host publicationCryptographic Hardware and Embedded Systems — CHES 2001
Place of PublicationBerlin
PublisherSpringer Verlag
Pages202-219
Volume2162
ISBN (Print)3-540-42521-7
Publication statusPublished - 2001
EventCHES - Boston, United States
Duration: 11 Aug 200413 Aug 2004

Publication series

NameLecture Notes in Computer Science
PublisherSpringer Verlag

Conference

ConferenceCHES
CountryUnited States
CityBoston
Period11/08/0413/08/04

Treatment code (Nähere Zuordnung)

  • Application
  • Experimental

Cite this

Großschädl, J. (2001). A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m). In Cryptographic Hardware and Embedded Systems — CHES 2001 (Vol. 2162, pp. 202-219). (Lecture Notes in Computer Science). Berlin: Springer Verlag.