Research output per year
Research output per year
Search results
-
2003
Computing Diagnoses Efficiently: A Fast Theorem Prover For Propositinal Horn Clause Theories
Peischl, B. & Wotawa, F., 2003, DX-03, Proceedings of the 14th International Workshop on Principles of Diagnosis 2003. ., p. 175-180 (DX Woskshop Series).Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review
-
Debugging VHDL Designs Using Temporal Process Instances
Peischl, B., Wotawa, F. & Köb, D., 2003, Developments in Artificial Intelligence. Chung, P. W. H., Hinde, C. & Ali, M. (eds.). Berlin, Heidelberg: Springer, Vol. 2718. p. 402-415 (Lecture notes in computer science : Lecture Notes in Artificial Intelligence).Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review
-
Model-Based Diagnosis or Reasoning from First Principles
Peischl, B. & Wotawa, F., 2003, In: IEEE Intelligent Systems. 18, 3;May/June, p. 32-37Research output: Contribution to journal › Article › peer-review
-
Modeling State in Software Debugging of VHDL-RTL Designs - A Model-based Diagnosis Approach
Wotawa, F. & Peischl, B., 2003, Proceedings of the Fifth International Workshop on Automated Debugging (AADEBUG). ., p. 197-210Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review
-
Towards a Framework for Automated Debugging: Abstracting the Temporal Behavior of VHDL-RTL Programs
Peischl, B. & Wotawa, F., 2003, Towards a Framework for Automated Debugging: Abstracting the Temporal Behavior of VHDL-RTL Programs. ., Vol. 14. p. 181-186 (DX Workshop Series).Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review
-
2001
Fixing Faults in VHDL-RTL Programs: An Application of Model-based Diagnosis to Digital Circuit Design
Peischl, B. & Wotawa, F., 2001, In: ÖGAI-Journal. 21, 4, p. 6-17Research output: Contribution to journal › Article