VHDL - Debugging VHDL Programs (DEV)

Project: Research project

Project Details

Description

The DEV Project aims at supporting and automating software debugging of VHDL programs, i.e., locating and (if possible) correcting bugs. The debugging tool to be developed during DEV adapts model-based diagnosis (MBD) for debugging. Project DEV should be a next step in providing models of VHDL programs in order to make the application of MBD to debugging more
application oriented. During DEV the development of logical models of VHDL programs considering practical requirements regarding debugging time, the user interface, and coupling debugging with simulation and verification tools, is a main issue. Project DEV is expected to deliver multiple models of programs, means for allowing to handle those models, an empirically evaluation of the obtained results using real-world VHDL programs, an improvement of available diagnosis algorithms, and finally, the foundations of using a planning system for controlling and optimizing the whole debugging process.
StatusFinished
Effective start/end date1/11/0131/08/04