Project Details
Description
New testing methods are required as the complexity of Field Programmable
Gate Array (FPGA) designs grow rapidly and time-to-market demands shorten.
In this work we investigate such new, physical fault injection methods for
the test of a system's self-stabilizing property, that is its intrinsic
ability to recover from transient faults. Therefore we develop a fault
injection unit directly implemented in an FPGA. This unit allows to inject
single/multiple bit faults, signal delays or the deactivation of complete
internal modules. Faults are permanent or temporary. Fault trigger are
temporal or local. Additionally we inject transient faults in
look-up-table based FPGA designs by dynamical, partial reconfiguration. In
a case study we will use a voice communication network to investigate our
methods.
Status | Finished |
---|---|
Effective start/end date | 1/01/00 → 31/01/02 |
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