Ultra-Low-Power Sub-1 V 29 ppm/°C Voltage Reference and Shared-Resistive Current Reference

Darshan Shetty; Christoph Steffan; Gerald Holweg; Wolfgang Bosch; Jasmin Grosinger

doi:10.1109/TCSI.2022.3225574

Ultra-Low-Power Sub-1 V 29 ppm/°C Voltage Reference and Shared-Resistive Current Reference

Darshan Shetty, Christoph Steffan, Gerald Holweg, Wolfgang Bosch, Jasmin Grosinger^*

^*Korrespondierende/r Autor/-in für diese Arbeit

Institut für Hochfrequenztechnik (4510)

Publikation: Beitrag in einer Fachzeitschrift › Artikel › Begutachtung

Abstract

This paper presents a curvature-compensated sub-1V voltage reference (VR) and a shared-resistive nanoampere current reference (CR) in a 130nm CMOS process. The CR is used to generate a bipolar junction transistor complementary-to-absolute-temperature voltage, which is summed up with a proportional-to-absolute-temperature voltage generated using a summing network of PMOS gate-coupled pairs. The measured output voltage and current references from 10 chips (VREF and IREF) at room temperature are 469mV and 1.86nA, respectively. The measured average temperature coefficient of VREF and IREF are 29ppm/°C and 822ppm/°C over a temperature range from - 40°C to 120°C. The minimum supply voltage of the voltage-current reference is 0.95V, and the total power consumption is 30nW.

Originalsprache	englisch
Seiten (von - bis)	1030 - 1042
Fachzeitschrift	IEEE Transactions on Circuits and Systems I: Regular Papers
Jahrgang	70
Ausgabenummer	3
DOIs	https://doi.org/10.1109/TCSI.2022.3225574
Publikationsstatus	Veröffentlicht - 2023

ASJC Scopus subject areas

Hardware und Architektur
Elektrotechnik und Elektronik

Fields of Expertise

Information, Communication & Computing

UN SDGs

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title = "Ultra-Low-Power Sub-1 V 29 ppm/°C Voltage Reference and Shared-Resistive Current Reference",

abstract = "This paper presents a curvature-compensated sub-1V voltage reference (VR) and a shared-resistive nanoampere current reference (CR) in a 130nm CMOS process. The CR is used to generate a bipolar junction transistor complementary-to-absolute-temperature voltage, which is summed up with a proportional-to-absolute-temperature voltage generated using a summing network of PMOS gate-coupled pairs. The measured output voltage and current references from 10 chips (VREF and IREF) at room temperature are 469mV and 1.86nA, respectively. The measured average temperature coefficient of VREF and IREF are 29ppm/°C and 822ppm/°C over a temperature range from - 40°C to 120°C. The minimum supply voltage of the voltage-current reference is 0.95V, and the total power consumption is 30nW.",

keywords = "current reference, curvature compensation, high-precision, Manganese, Resistors, sub-1V, sub-threshold CMOS design, temperature compensation, Temperature dependence, Temperature measurement, Threshold voltage, Transistors, ultra-low-power, Video recording, Voltage reference, voltage-current reference",

author = "Darshan Shetty and Christoph Steffan and Gerald Holweg and Wolfgang Bosch and Jasmin Grosinger",

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year = "2023",

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AU - Shetty, Darshan

AU - Steffan, Christoph

AU - Holweg, Gerald

AU - Bosch, Wolfgang

AU - Grosinger, Jasmin

N1 - Publisher Copyright: Author

PY - 2023

Y1 - 2023

N2 - This paper presents a curvature-compensated sub-1V voltage reference (VR) and a shared-resistive nanoampere current reference (CR) in a 130nm CMOS process. The CR is used to generate a bipolar junction transistor complementary-to-absolute-temperature voltage, which is summed up with a proportional-to-absolute-temperature voltage generated using a summing network of PMOS gate-coupled pairs. The measured output voltage and current references from 10 chips (VREF and IREF) at room temperature are 469mV and 1.86nA, respectively. The measured average temperature coefficient of VREF and IREF are 29ppm/°C and 822ppm/°C over a temperature range from - 40°C to 120°C. The minimum supply voltage of the voltage-current reference is 0.95V, and the total power consumption is 30nW.

AB - This paper presents a curvature-compensated sub-1V voltage reference (VR) and a shared-resistive nanoampere current reference (CR) in a 130nm CMOS process. The CR is used to generate a bipolar junction transistor complementary-to-absolute-temperature voltage, which is summed up with a proportional-to-absolute-temperature voltage generated using a summing network of PMOS gate-coupled pairs. The measured output voltage and current references from 10 chips (VREF and IREF) at room temperature are 469mV and 1.86nA, respectively. The measured average temperature coefficient of VREF and IREF are 29ppm/°C and 822ppm/°C over a temperature range from - 40°C to 120°C. The minimum supply voltage of the voltage-current reference is 0.95V, and the total power consumption is 30nW.

KW - current reference

KW - curvature compensation

KW - high-precision

KW - Manganese

KW - Resistors

KW - sub-1V

KW - sub-threshold CMOS design

KW - temperature compensation

KW - Temperature dependence

KW - Temperature measurement

KW - Threshold voltage

KW - Transistors

KW - ultra-low-power

KW - Video recording

KW - Voltage reference

KW - voltage-current reference

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Ultra-Low-Power Sub-1 V 29 ppm/°C Voltage Reference and Shared-Resistive Current Reference

Abstract

ASJC Scopus subject areas

Fields of Expertise

UN SDGs

Zugriff auf Dokument

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Projekte

Wireless Power Transmission for Sustainable Electronics (WIPE)

Radio Frequenz Identifikation (RFID) Technologie

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