TLP IV characterization of a 40 nm CMOS IO protection concept in the powered state

Benjamin Orr; Krzysztof Domanski; Harald Gossner; David Pommerenke

doi:10.1109/EOSESD.2016.7592566

TLP IV characterization of a 40 nm CMOS IO protection concept in the powered state

Benjamin Orr, Krzysztof Domanski, Harald Gossner, David Pommerenke

Publikation: Beitrag in Buch/Bericht/Konferenzband › Beitrag in einem Konferenzband › Begutachtung

Abstract

In this paper, the interaction between the ESD protection concept and a powered output driver in a 40 nm CMOS process are investigated and characterized by TLP. By using IO test chips designed for HBM and CDM validation, the IV behavior of the pin is measured with the driver placed into various states.

Originalsprache	englisch
Titel	Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2016, EOS/ESD 2016
Herausgeber (Verlag)	ESD Association
ISBN (elektronisch)	9781585372898
DOIs	https://doi.org/10.1109/EOSESD.2016.7592566
Publikationsstatus	Veröffentlicht - 14 Okt. 2016
Extern publiziert	Ja
Veranstaltung	38th Annual Electrical Overstress/Electrostatic Discharge Symposium: EOS/ESD 2016 - Garden Grove (Anaheim), USA / Vereinigte Staaten Dauer: 11 Sept. 2016 → 16 Sept. 2016

Publikationsreihe

Name	Electrical Overstress/Electrostatic Discharge Symposium Proceedings
Band	2016-October
ISSN (Print)	0739-5159

Konferenz

Konferenz	38th Annual Electrical Overstress/Electrostatic Discharge Symposium
Land/Gebiet	USA / Vereinigte Staaten
Ort	Garden Grove (Anaheim)
Zeitraum	11/09/16 → 16/09/16

ASJC Scopus subject areas

Elektrotechnik und Elektronik

Zugriff auf Dokument

10.1109/EOSESD.2016.7592566

Andere Dateien und Links

http://www.scopus.com/inward/record.url?scp=85008889888&partnerID=8YFLogxK

Dieses zitieren

Orr, B., Domanski, K., Gossner, H., & Pommerenke, D. (2016). TLP IV characterization of a 40 nm CMOS IO protection concept in the powered state. in Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2016, EOS/ESD 2016 Artikel 7592566 (Electrical Overstress/Electrostatic Discharge Symposium Proceedings; Band 2016-October). ESD Association. https://doi.org/10.1109/EOSESD.2016.7592566

TLP IV characterization of a 40 nm CMOS IO protection concept in the powered state. / Orr, Benjamin; Domanski, Krzysztof; Gossner, Harald et al.
Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2016, EOS/ESD 2016. ESD Association, 2016. 7592566 (Electrical Overstress/Electrostatic Discharge Symposium Proceedings; Band 2016-October).

Publikation: Beitrag in Buch/Bericht/Konferenzband › Beitrag in einem Konferenzband › Begutachtung

Orr, B, Domanski, K, Gossner, H & Pommerenke, D 2016, TLP IV characterization of a 40 nm CMOS IO protection concept in the powered state. in Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2016, EOS/ESD 2016., 7592566, Electrical Overstress/Electrostatic Discharge Symposium Proceedings, Bd. 2016-October, ESD Association, 38th Annual Electrical Overstress/Electrostatic Discharge Symposium, Garden Grove (Anaheim), USA / Vereinigte Staaten, 11/09/16. https://doi.org/10.1109/EOSESD.2016.7592566

@inproceedings{54b719134e7947dcb68f578c9bb3dccd,

title = "TLP IV characterization of a 40 nm CMOS IO protection concept in the powered state",

abstract = "In this paper, the interaction between the ESD protection concept and a powered output driver in a 40 nm CMOS process are investigated and characterized by TLP. By using IO test chips designed for HBM and CDM validation, the IV behavior of the pin is measured with the driver placed into various states.",

author = "Benjamin Orr and Krzysztof Domanski and Harald Gossner and David Pommerenke",

year = "2016",

month = oct,

day = "14",

doi = "10.1109/EOSESD.2016.7592566",

language = "English",

series = "Electrical Overstress/Electrostatic Discharge Symposium Proceedings",

publisher = "ESD Association",

booktitle = "Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2016, EOS/ESD 2016",

note = "38th Annual Electrical Overstress/Electrostatic Discharge Symposium : EOS/ESD 2016 ; Conference date: 11-09-2016 Through 16-09-2016",

}

TY - GEN

T1 - TLP IV characterization of a 40 nm CMOS IO protection concept in the powered state

AU - Orr, Benjamin

AU - Domanski, Krzysztof

AU - Gossner, Harald

AU - Pommerenke, David

PY - 2016/10/14

Y1 - 2016/10/14

N2 - In this paper, the interaction between the ESD protection concept and a powered output driver in a 40 nm CMOS process are investigated and characterized by TLP. By using IO test chips designed for HBM and CDM validation, the IV behavior of the pin is measured with the driver placed into various states.

AB - In this paper, the interaction between the ESD protection concept and a powered output driver in a 40 nm CMOS process are investigated and characterized by TLP. By using IO test chips designed for HBM and CDM validation, the IV behavior of the pin is measured with the driver placed into various states.

UR - http://www.scopus.com/inward/record.url?scp=85008889888&partnerID=8YFLogxK

U2 - 10.1109/EOSESD.2016.7592566

DO - 10.1109/EOSESD.2016.7592566

M3 - Conference paper

AN - SCOPUS:85008889888

T3 - Electrical Overstress/Electrostatic Discharge Symposium Proceedings

BT - Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2016, EOS/ESD 2016

PB - ESD Association

T2 - 38th Annual Electrical Overstress/Electrostatic Discharge Symposium

Y2 - 11 September 2016 through 16 September 2016

ER -