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Abstract
We have developed a MiAMoRE test chip in a 0.18 µm CMOS process, containing a selection of devices typically used in analog integrated circuit design: MOS transistors of different types and polarities, bipolar transistors, resistors, capacitors, diodes and field oxide transistors. Many of these devices were designed with non-standard layouts with the objective to improve the performance against TID effects. In total there are over a hundred devices, therefore their full characterization was the primary challenge in the test concept. The test chip has been exposed at two different sources: low and medium energy X-rays including characterization at different dose steps. After showing the test results of selected devices we discuss the details on TID calculation and reporting, in the attempt to make a correct comparison of the results from two different facilities.
Originalsprache | englisch |
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Publikationsstatus | Veröffentlicht - 2017 |
Veranstaltung | The 13th International School on the Effects of Radiation on Embedded Systems for Space Applications - Leibniz Rechenzentrum, Garching, Deutschland Dauer: 23 Okt. 2017 → 26 Okt. 2017 Konferenznummer: 13 https://seressa.in.tum.de/ |
Workshop
Workshop | The 13th International School on the Effects of Radiation on Embedded Systems for Space Applications |
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Kurztitel | SERESSA 2017 |
Land/Gebiet | Deutschland |
Ort | Garching |
Zeitraum | 23/10/17 → 26/10/17 |
Internetadresse |
Fields of Expertise
- Information, Communication & Computing
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TID characterization at low and medium energy X-rays of 0.18 µm analog integrated test chip MiAMoRE
Varvara Bezhenova (Redner/in) & Alicja Malgorzata Michalowska-Forsyth (Redner/in)
23 Okt. 2017 → 26 Okt. 2017Aktivität: Vortrag oder Präsentation › Posterpräsentation › Science to science