Security Improvement in Embedded Systems via an Efficient Hardware Bound Checking Architecture

Michael Georg Grasser

doi:10.1108/17440080710829270

Security Improvement in Embedded Systems via an Efficient Hardware Bound Checking Architecture

Michael Georg Grasser

Institut für Technische Informatik (4480)

Publikation: Beitrag in einer Fachzeitschrift › Artikel › Begutachtung

Originalsprache	englisch
Seiten (von - bis)	153-172
Fachzeitschrift	International Journal of Web Information Systems
Jahrgang	3
Ausgabenummer	1/2
DOIs	https://doi.org/10.1108/17440080710829270
Publikationsstatus	Veröffentlicht - 2007

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SecureCPU - Improving Code-Security by Extension of CPU-Registers
Grasser, M. G. & Brenner, E.
10/03/06 → 31/01/08
Projekt: Forschungsprojekt

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Security Improvement in Embedded Systems via an Efficient Hardware Bound Checking Architecture

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SecureCPU - Improving Code-Security by Extension of CPU-Registers

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