Abstract
This article presents an overview of modern integration concepts for receiver, transmitter and duplexer architectures. Based on innovative design techniques, a system-in-package integrated RF transceiver architecture is proposed as a low-cost low-power alternative to traditional multi-standard transceivers. The proposed transceiver architecture unites advantages of a sub-sampling receiver with tunable low noise amplifier (LNA), a high-efficiency digital power amplifier and an integrated duplexer with on-package passive components in order to fulfill the more and more stringent requirements for wireless systems. In addition to the transceiver architecture, measurement results of building blocks are presented. A LNA circuit implemented in 65nm CMOS technology provides a continuously tunable-gain (3–23 dB) and a tunable frequency band (4.5 GHz–5.5 GHz) with noise figure of 2dB and IIP3 of −6.5dBm at the highest gain. A high Q-factor, on-package transformer, implemented in a core-less 3-metal layer system-in-package substrate, presents a coupling factor of 0.6 and a Q-factor of approximately 30. This provides a low-cost, high-performance alternative solution to integrated matching networks and duplexers.
Titel in Übersetzung | Integration solutions for reconfigurable multi-standard wireless transceivers |
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Originalsprache | deutsch |
Seiten (von - bis) | 18-23 |
Seitenumfang | 6 |
Fachzeitschrift | Elektrotechnik und Informationstechnik |
Jahrgang | 135 |
Ausgabenummer | 1 |
DOIs | |
Publikationsstatus | Veröffentlicht - 1 Feb. 2018 |
Schlagwörter
- integrated duplexer
- multi-standard
- RF transceivers
- sub-sampling
- tunable LNA
ASJC Scopus subject areas
- Elektrotechnik und Elektronik