Effects of TVS integration on system level ESD robustness

Wei Huang; Jeffrey Dunnihoo; David Pommerenke

Effects of TVS integration on system level ESD robustness

Wei Huang^*, Jeffrey Dunnihoo, David Pommerenke

^*Korrespondierende/r Autor/-in für diese Arbeit

Publikation: Beitrag in Buch/Bericht/Konferenzband › Beitrag in einem Konferenzband › Begutachtung

Abstract

Higher integration of Transient Voltage Suppression (TVS) functionality into ASIC I/O cells implies lower system costs. But as the ESD pulse is directed deeper into the system, migrating the TVS clamping function from the periphery of the system to a central ASIC may actually reduce the system's ESD robustness. ESD current reconstruction scanning can be used to trace the current path on a PCB, and possibly within an IC. The article compares the current spreading during and ESD for different ESD protection methods.

Originalsprache	englisch
Titel	Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2010, EOS/ESD 2010
Publikationsstatus	Veröffentlicht - 24 Dez. 2010
Extern publiziert	Ja
Veranstaltung	32nd Annual Electrical Overstress/Electrostatic Discharge Symposium: EOS/ESD 2010 - Reno, USA / Vereinigte Staaten Dauer: 3 Okt. 2010 → 8 Okt. 2010

Publikationsreihe

Name	Electrical Overstress/Electrostatic Discharge Symposium Proceedings
ISSN (Print)	0739-5159

Konferenz

Konferenz	32nd Annual Electrical Overstress/Electrostatic Discharge Symposium
Land/Gebiet	USA / Vereinigte Staaten
Ort	Reno
Zeitraum	3/10/10 → 8/10/10

ASJC Scopus subject areas

Elektrotechnik und Elektronik

Andere Dateien und Links

http://www.scopus.com/inward/record.url?scp=78650411487&partnerID=8YFLogxK

Dieses zitieren

Effects of TVS integration on system level ESD robustness. / Huang, Wei; Dunnihoo, Jeffrey; Pommerenke, David.
Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2010, EOS/ESD 2010. 2010. 5623717 (Electrical Overstress/Electrostatic Discharge Symposium Proceedings).

Publikation: Beitrag in Buch/Bericht/Konferenzband › Beitrag in einem Konferenzband › Begutachtung

Huang, W, Dunnihoo, J & Pommerenke, D 2010, Effects of TVS integration on system level ESD robustness. in Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2010, EOS/ESD 2010., 5623717, Electrical Overstress/Electrostatic Discharge Symposium Proceedings, 32nd Annual Electrical Overstress/Electrostatic Discharge Symposium, Reno, Nevada, USA / Vereinigte Staaten, 3/10/10.

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abstract = "Higher integration of Transient Voltage Suppression (TVS) functionality into ASIC I/O cells implies lower system costs. But as the ESD pulse is directed deeper into the system, migrating the TVS clamping function from the periphery of the system to a central ASIC may actually reduce the system's ESD robustness. ESD current reconstruction scanning can be used to trace the current path on a PCB, and possibly within an IC. The article compares the current spreading during and ESD for different ESD protection methods.",

author = "Wei Huang and Jeffrey Dunnihoo and David Pommerenke",

year = "2010",

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AU - Huang, Wei

AU - Dunnihoo, Jeffrey

AU - Pommerenke, David

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N2 - Higher integration of Transient Voltage Suppression (TVS) functionality into ASIC I/O cells implies lower system costs. But as the ESD pulse is directed deeper into the system, migrating the TVS clamping function from the periphery of the system to a central ASIC may actually reduce the system's ESD robustness. ESD current reconstruction scanning can be used to trace the current path on a PCB, and possibly within an IC. The article compares the current spreading during and ESD for different ESD protection methods.

AB - Higher integration of Transient Voltage Suppression (TVS) functionality into ASIC I/O cells implies lower system costs. But as the ESD pulse is directed deeper into the system, migrating the TVS clamping function from the periphery of the system to a central ASIC may actually reduce the system's ESD robustness. ESD current reconstruction scanning can be used to trace the current path on a PCB, and possibly within an IC. The article compares the current spreading during and ESD for different ESD protection methods.

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M3 - Conference paper

AN - SCOPUS:78650411487

SN - 1585371823

SN - 9781585371822

T3 - Electrical Overstress/Electrostatic Discharge Symposium Proceedings

BT - Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2010, EOS/ESD 2010

T2 - 32nd Annual Electrical Overstress/Electrostatic Discharge Symposium

Y2 - 3 October 2010 through 8 October 2010

ER -

Effects of TVS integration on system level ESD robustness

Abstract

Publikationsreihe

Konferenz

ASJC Scopus subject areas

Andere Dateien und Links

Fingerprint

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