DC-DC buck converter EMI reduction using PCB layout modification

Ankit Bhargava*, David Pommerenke, Keong W. Kam, Federico Centola, Cheng Wei Lam

*Korrespondierende/r Autor/in für diese Arbeit

Publikation: Beitrag in einer FachzeitschriftArtikel


The paper treats the effect of layout on the electromagnetic interference (EMI) of buck converters. An optimized layout design for dc-dc synchronous buck converter is proposed for EMI reduction. Six different layout versions are analyzed with respect to loop area, loop inductance, radiating dipole moments, and far-field radiation. Optimizations are done with respect to field-effect transistor (FET), decoupling capacitor and via placement. Passive full-wave simulations are used to estimate and verify the loop inductance and far-field emissions. Those are compared with measurements. A gigahertz transverse electromagnetic (GTEM) cell is used to quantify the dipole moments in the printed circuit board (PCB) for estimating the far field and comparing to measurement.

Seiten (von - bis)806-813
FachzeitschriftIEEE Transactions on Electromagnetic Compatibility
PublikationsstatusVeröffentlicht - 1 Aug 2011
Extern publiziertJa

ASJC Scopus subject areas

  • !!Atomic and Molecular Physics, and Optics
  • !!Condensed Matter Physics
  • !!Electrical and Electronic Engineering

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