DC-DC buck converter EMI reduction using PCB layout modification

Ankit Bhargava; David Pommerenke; Keong W. Kam; Federico Centola; Cheng Wei Lam

doi:10.1109/TEMC.2011.2145421

DC-DC buck converter EMI reduction using PCB layout modification

Ankit Bhargava^*, David Pommerenke, Keong W. Kam, Federico Centola, Cheng Wei Lam

^*Korrespondierende/r Autor/-in für diese Arbeit

Publikation: Beitrag in einer Fachzeitschrift › Artikel › Begutachtung

Abstract

The paper treats the effect of layout on the electromagnetic interference (EMI) of buck converters. An optimized layout design for dc-dc synchronous buck converter is proposed for EMI reduction. Six different layout versions are analyzed with respect to loop area, loop inductance, radiating dipole moments, and far-field radiation. Optimizations are done with respect to field-effect transistor (FET), decoupling capacitor and via placement. Passive full-wave simulations are used to estimate and verify the loop inductance and far-field emissions. Those are compared with measurements. A gigahertz transverse electromagnetic (GTEM) cell is used to quantify the dipole moments in the printed circuit board (PCB) for estimating the far field and comparing to measurement.

Originalsprache	englisch
Aufsatznummer	5948375
Seiten (von - bis)	806-813
Seitenumfang	8
Fachzeitschrift	IEEE Transactions on Electromagnetic Compatibility
Jahrgang	53
Ausgabenummer	3
DOIs	https://doi.org/10.1109/TEMC.2011.2145421
Publikationsstatus	Veröffentlicht - 1 Aug. 2011
Extern publiziert	Ja

ASJC Scopus subject areas

Atom- und Molekularphysik sowie Optik
Physik der kondensierten Materie
Elektrotechnik und Elektronik

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10.1109/TEMC.2011.2145421

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DC-DC buck converter EMI reduction using PCB layout modification

Abstract

ASJC Scopus subject areas

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