Analysis of current sharing in large and small-signal IC pin models

Benjamin Orr, Pratik Maheshwari, David Pommerenke, Harald Gossner, Wolfgang Stadler

Publikation: Beitrag in einer FachzeitschriftKonferenzartikel

Abstract

A comprehensive model of a clock line including large and small signal pin parameters, as well as channel parameters is presented. The small signal model allows analysis of in-band interference which can lead to soft failures, while large signal models allow for the simulation of current sharing between driver/receiver pin pairs.

Originalspracheenglisch
FachzeitschriftElectrical Overstress Electrostatic Discharge Symposium Proceedings
Jahrgang2014-November
AusgabenummerNovember
PublikationsstatusVeröffentlicht - 26 Nov 2014
Extern publiziertJa
Veranstaltung36th International Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2014 - Tucson, USA / Vereinigte Staaten
Dauer: 7 Sep 201412 Sep 2014

ASJC Scopus subject areas

  • !!Electrical and Electronic Engineering

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