An efficient approach for power delivery network design with closed-form expressions for parasitic interconnect inductances

Cheng Wang*, Jingkun Mao, Giuseppe Selli, Shaofeng Luan, Lin Zhang, Jun Fan, David J. Pommerenke, Richard E. DuBroff, James L. Drewniak

*Korrespondierende/r Autor/-in für diese Arbeit

Publikation: Beitrag in einer FachzeitschriftArtikelBegutachtung

Abstract

Investigation of a dc power delivery network, consisting of a multilayer PCB using area fills for power and return, involves the distributed behavior of the power/ground planes and the parasitics associated with the lumped components mounted on it. Full-wave methods are often employed to study the power integrity problem. While full-wave methods can be accurate, they are time and memory consuming. The cavity model of a rectangular structure has previously been employed to efficiently analyze the simultaneous switching noise (SSN) in the power distribution network. However, a large number of modes in the cavity model are needed to accurately simulate the impedance associated with the vias, leading to computational inefficiency. A fast approach is detailed herein to accelerate calculation of the summation associated with the higher-order modes. Closed-form expressions for the parasitics associated with the interconnects of the decoupling capacitors are also introduced. Combining the fast calculation of the cavity models of regularly shaped planar circuits, a segmentation method, and closed-form expressions for the parasitics, an efficient approach is proposed herein to analyze an arbitrary shaped power distribution network. While it may take many hours for a full-wave method to do a single simulation, the proposed method can generally perform the simulation with good accuracy in several minutes. Another advantage of the proposed method is that a SPICE equivalent circuit of the power distribution network can be derived. This allows both frequency and transient responses to be done with SPICE simulation.

Originalspracheenglisch
Seiten (von - bis)320-334
Seitenumfang15
FachzeitschriftIEEE Transactions on Advanced Packaging
Jahrgang29
Ausgabenummer2
DOIs
PublikationsstatusVeröffentlicht - 1 Mai 2006
Extern publiziertJa

ASJC Scopus subject areas

  • Elektrotechnik und Elektronik

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