Abstract
This document proposes a new methodology to measure the voltage-dependent behavior of parasitic capacitances of super junction power MOSFETs. The measurement technique allows to extract all parasitic elements (capacitances and inductances) with only one measurement while a variable DC voltage is applied between the drain and source pin of the super junction MOSFET. The results can be used to create simulation models of MOSFETs and possibly complete power modules, that accurately represent their high frequency behavior to solve electromagnetic compatibility (EMC) problems in transient simulators, such as LTspice.
Originalsprache | englisch |
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Titel | 2019 21st European Conference on Power Electronics and Applications, EPE 2019 ECCE Europe |
Herausgeber (Verlag) | Institute of Electrical and Electronics Engineers |
ISBN (elektronisch) | 9789075815313 |
DOIs | |
Publikationsstatus | Veröffentlicht - Sept. 2019 |
Veranstaltung | 21st European Conference on Power Electronics and Applications, ECCE Europe: EPE 2019 - Genova, Italien Dauer: 3 Sept. 2019 → 5 Sept. 2019 |
Konferenz
Konferenz | 21st European Conference on Power Electronics and Applications, ECCE Europe |
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Land/Gebiet | Italien |
Ort | Genova |
Zeitraum | 3/09/19 → 5/09/19 |
ASJC Scopus subject areas
- Maschinenbau
- Elektronische, optische und magnetische Materialien
- Steuerung und Optimierung
- Energieanlagenbau und Kraftwerkstechnik
- Elektrotechnik und Elektronik