A Hardware/Software Concept for Partial Logic Updates of Embedded Soft Processors at Runtime

Titel in Übersetzung: A Hardware/Software Concept for Partial Logic Updates of Embedded Soft Processors at Runtime

Publikation: Beitrag in Buch/Bericht/KonferenzbandBeitrag in einem KonferenzbandBegutachtung

Abstract

Embedded systems are built from various hardware
components and execute software on one or more microcontroller
units (MCU). These MCUs usually contain a fixed integrated
circuit, thus disallowing modifications to their logic at runtime.
While this keeps the instruction set architecture (ISA) fixed as
well, it leaves the software as the only flexible part in the system.
But what if the MCU logic could be easily changed at runtime
in order to fix bugs or if the ISA could be extended on-the-fly in
order to introduce application-specific instructions and features
on demand?
This work demonstrates a concept for introducing more hardware
flexibility through application-specific MCU modifications.
Therefore, the MCU is implemented as a soft core on a fieldprogrammable
gate array (FPGA) and we reconfigure its logic
with support of the operating system (OS) running on it. The
reconfiguration happens on-the-fly, so no interruption of the
application code or even a system restart is required. Therefore,
(i) the MCU pipeline is specially designed for extensibility by new
instructions, and (ii) the FPGA is selected to support partial selfreconfiguration
of its logic cells at runtime. As long as an instruction
is not yet part of the ISA, the OS supports its emulation to
provide a consistent interface for applications. Apart, no special
compiler support is required, but the application must provide
either the emulation code or a hardware description for adding
the required logic. For a proof of concept, we use a RISC-V based
MCU on a Xilinx Artix-7 FPGA and for evaluating the general
benefit of our approach we use an algorithm that is costly when
executed with the original ISA but fast with application-specific
instructions added at runtime. The experimental evaluation also
shows that the on-the-fly hardware update does not disrupt or
compromise the software execution flow.
Titel in ÜbersetzungA Hardware/Software Concept for Partial Logic Updates of Embedded Soft Processors at Runtime
Originalspracheenglisch
Titel24th Euromicro Conference on Digital System Design (DSD)
ErscheinungsortPalermo, Italy
Herausgeber (Verlag)EUROMICRO
Seiten199
Seitenumfang9
ISBN (elektronisch)978-1-6654-2703-6
ISBN (Print)978-1-6654-2704-3
DOIs
PublikationsstatusVeröffentlicht - 1 Sep. 2021
Veranstaltung2021 Euromicro Conference on Digital System Design : DSD 2021 - Virtuell, Österreich
Dauer: 1 Sep. 20213 Sep. 2021
https://dsd-seaa2021.unipv.it/index.html#page-top

Konferenz

Konferenz2021 Euromicro Conference on Digital System Design
KurztitelDSD 2021
Land/GebietÖsterreich
OrtVirtuell
Zeitraum1/09/213/09/21
Internetadresse

Fields of Expertise

  • Information, Communication & Computing

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