BEYOND-Beyond Serial CMOS - Beyond Serial CMOS Links

  • Böhm, Christoph, (Teilnehmer (Co-Investigator))
  • Erb, Stefan, (Teilnehmer (Co-Investigator))
  • Pribyl, Wolfgang (Projektleiter (Principal Investigator))

Projekt: Foschungsprojekt

Beschreibung

The overall objective of BEYOND is to develop a highly innovative technology and design platform for high-speed and short range data bus systems. High performance analogue and mixed signal modules will be designed and demonstrated usin SoC technology with enhanced functionality optimised for high frequency and high-speed integrated circuit solutions. The electronic industry, especially the PC server industry, is undergoing a significant technology transition with the traditional parallel data busses being replaced by serial high-speed interconnects like SATA, PCI Express, Fibre Channel, Hyper Transport or InfiniBand. There is a heavy demand on aggressive innovation by researching in the fields of these novel serial interfaces, which will offer the benefit of highest speed, smallest footprint, lowest cost, and complexity reduction in Systems on Chip (SoC) and Systems in Package (SiP). The main goal of the project "BEYOND" is to develop a universal PHY prototype as the basis for future high-speed serial interfaces, because all of the high-speed technologies mentioned above are based on very similar components. The project "BEYOND aims to influence the upcoming standarda for future serial interfaces by actibe contribution within standardization comittees. The project deals with many aspects of high frequency design, system co-design, manufacturability including environmental testing, reliability testing and cost of manufacture of each of the processing route developed. The project results will lay the cornerstone for future embedded PHY solutions above 8 Gbit/sec for the next six or eight years. The challenge is to develop a multi-standard serial interface macro for high-speed performance at minimum power and costs. Furthermore the interface should be able to deal with low-cost and low quality backplane hardware and transmission channels.
StatusAbschlussdatum
Tatsächlicher Beginn/ -es Ende1/10/0630/09/09